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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101
1:1 Active HDMITM Redriver with Optimized Equalization & I2C Buffer
Features
* * * * * * * * * * * * * * * * * Supply voltage, VDD = 3.3V 5% Support for both DVI and HDMITM signals Supports both AC-coupled and DC-coupled inputs Supports Deep ColorTM High Performance, up to 2.5 Gbps per channel 5V Tolerance on I2C path Integrated 50-ohm (10%) termination resistors at each high speed signal input Rx Sense Support, CLK-off channel is switched to 250K-Ohm pull-up vs. 50-Ohm pull-up Configurable output swing control (400mV, 500mV, 600mV, 750mV, 1000mV) Configurable Pre-Emphasis levels (0dB, 1.5dB, 3.5dB, & 6.0dB, 9.0dB) Configurable De-Emphasis (0dB, -3.5dB, -6.0dB, -9.5dB) Optimized Equalization Single default setting will support all cable lengths 8kV Contact ESD protection on all high speed input data channels per IEC 61000-4-2 Hot insertion support on output high speed pins & SCL/SDA pins only Propagation delay 1ns High Impedance Outputs when disabled Packaging (Pb-free & Green): 42-contact TQFN (ZH42)
Description
Pericom Semiconductor's PI3HDMI101 1:1 active redriver circuit is targeted for high-resolution video networks that are based on DVI/HDMITM standards and TMDS signal processing. The PI3HDMI101 is an active redriver with Hi-Z outputs. The device receives differential signals from selected video components and drives the video display unit. This solution also provides a unique advanced pre-emphasis technique to increase rise and fall times which are reduced during transmission across long distances. Each complete HDMITM/DVI channel also has slower speed, side band signals, that are required to be switched. Pericom's solution provides a complete solution by integrating the side band buffer together with the high speed buffer in a single solution. Using Equalization at the input of each of the high speed channels, Pericom can successfully eliminate deterministic jitter caused by long cables from the source to the sink. The elimination of the deterministic jitter allows the user to use much longer cables (up to 25 meters). The maximum DVI/HDMITM Bandwidth of 2.5 Gbps provides 36bit deep colorTM support, which is offered by HDMITM revision 1.3. The PI3HDMI101 also provides enhanced robust ESD/EOS protection of 8kV, which is required by many consumer video networks today. The Optimized Equalization provides the user a single optimal setting that can provide HDMITM compliance for all cable lengths: 1meter to 20meters and color depths of 8bit/ch, or 12bit/ch. Pericom also offers the ability to fine tune the equalization settings in situations where cable length is known. For example, if 25meter cable length is required, Pericom's solution can be adjusted to 16dB EQ to accept 25meter cable length.
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Pin Configuration
IADJ SCL_R SDA_R SDA_T 42 41 40 39
EQ_S0 EQ_S1 GND IN_CLK- IN_CLK+ VDD IN_D0- IN_D0+ GND IN_D1- IN_D1+ VDD IN_D2- IN_D2+ GND Rx_Sense DCC_EN
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
GND
38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
SCL_T VDD GND OUT_CLK- OUT_CLK+ VDD OUT_D0- OUT_D0+ GND OUT_D1- OUT_D1+ VDD OUT_D2- OUT_D2+ GND VDD OC_S3
18 19 20 21 OE OC_S0 OC_S1 OC_S2
TMDS Receiver Block Each high speed data and clock input has integrated equalization that can eliminate deterministic jitter caused by input cables. All activity can be configured using pin strapping. The Rx block is designed to receive all relevant signals directly from the HDMI connector without any additional circuitry, 3 High speed TMDS data, 1 pixel clock, and DDC signals. Pixel clock channel has following temination scheme for Rx Sense support.
TM
AVDD
R2 250K ohm Control
Rx Sense L H
R2 switch is open, CLK+/termination is 250k R2 switch is closed, CLK+/termination is 50
Rx Sense
R1 CLK+/-
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
I2C Buffer
IADJ, DDC_EN
Buffer T
Port R
Port T
Buffer R
The VOL of the Buffer R is around 0.2V. The VOL of the Buffer T is around 0.7V.
Functional Truth Tables IADJ H L DDC_EN L H External Pull-Up Range 1K to 2K (HDMI spec) > 3K (4.7K typically) Port T / Port R (if no external pull-up resistor Hi-Z (I2C buffer disable) (I2C buffer enable)
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Pin Description
Pin # 5, 8, 11, 14 4, 7, 10, 13 3, 9, 15, 24, 30, 36 18 41 40 6, 12, 23, 27, 33, 37 34, 31, 28, 25 35, 32, 29, 26 1, 2 19, 20, 21, 22 17 38 39 16 42 Pin Name IN_CLK+, IN_D0+, IN_D1+, IN_D2+ IN_CLK-, IN_D0-, IN_D1-, IN_D2GND OE SCL_R SDA_R VDD OUT_CLK+, OUT_D0+, OUT_D1+, OUT_D2+ OUT_CLK-, OUT_D0-, OUT_ D1-, OUT_D2EQ_S0, EQ_S1 OC_S0, OC_S1, OC_S2, OC_S3 DDC_EN SCL_T SDA_T Rx_Sense IADJ I/O I I P I I/O I/O P O O I I I I/O I/O I I Description TMDS Positive inputs TMDS Negative inputs Ground Output Enable, Active LOW DDC Clock , Source Side DDC Data, Source Side 3.3V Power Supply TMDS positive outputs TMDS negative outputs Equalizer controls, both pins with internal pull-ups Output buffer controls Note: All 4 pins have internal pull-ups
I2C path enable DDC Clock, Sink side DDC Data, Sink side
Rx_Sense control
High/Low Voltage Selection, depends on I2C external pull-up range
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Complete high speed input Rx block is as follows:
EQ_S0
EQ_S1
250k R2 R2
150k
Control
VDD
OC_S0 OC_S1 OC_S2 OC_S3 OE
IN_CLK+ IN_CLK-
R1 R1 R e c e iv e r with E Q
TMDS drive
OUT_CLK+ OUT_CLK-
50
VDD 50
IN_D0+
R e c e iv e r with E Q
TMDS drive
OUT_D0+ OUT_D0-
IN_D050 VDD 50
IN_D1+
R e c e iv e r with E Q
TMDS drive
OUT_D1+ OUT_D1-
IN_D150 VDD 50
IN_D2+
R e c e iv e r with E Q
IN_D2-
TMDS drive
OUT_D2+ OUT_D2-
IADJ, DDC_EN Buffer T Port T
Port R
Buffer R
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Truth Table
OE 0 1 Function Active All TMDS outputs are Hi-Z
Truth Table 1 OC_S3(2) OC_S2(2) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
OC_S1(2) 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
OC_S0(2) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Vswing (mV) 500 600 750 1000 500 500 500 500 400 400 400 400 1000 660 500 330
Pre/Deemphasis 0 0 0 0 0 1.5dB 3.5dB 6dB 0 3.5dB 6dB 9dB 0 -3.5dB -6dB -9dB
EQ Setting Value Logic Table
EQ_S1(2) EQ_S0(2) 0 0 3dB on all high speed inputs 0 1 8dB on all high speed inputs 1 0 12dB on all high speed inputs 1 1 16dB on all high speed inputs Notes: 1. External pull-ups are required along SCL/SDA path 2. Internal 100Kohm pull-ups Setting Value @ 825MHz
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................................... -65C to +150C Supply Voltage to Ground Potential................................-0.5V to +4.0V DC Input Voltage ...............................................................-0.5V to VDD DC Output Current....................................................................... 120mA Power Dissipation ........................................................................... 1.0W
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Operating Conditions
Symbol VDD TA VID VIC VDD RT Parameter Supply Voltage Operating free-air temperature Receiver peak-to-peak differential input voltage Input common mode voltage TMDS output termination voltage Termination resistance when RxSense pin is HIGH Min. 3.135 0 150 2 3.135 45 0.25 3.3 50 Typ. 3.3 Max. 3.465 70 1560 VDD + 0.01 3.465 55 2.5 Units V C mVp-p V V ohm Gbps
TMDS Differential Pins
TMDS Data Signaling rate Rate Control Pins (OC_Sx, EQ_Sx, OE, DDC_EN) VIH VIL VI(DDC)
2
LVTTL High-level input voltage LVTTL Low-level input voltage Input voltage High-level input voltage Low-level input voltage Low-level input voltage contention High-level input voltage
(1)
2 GND GND 0.7 x VDD -0.5 -0.5 0.7 x VDD
VDD 0.8 5.5 5.5 0.3 x VDD 0.4 5.5
V
DDC Pins (SCL_R, SCL_T, SDA_R, SDA_T) V V V V V I C Pins (SCL_T, SDA_T) VIH VIL VICL
2
I C Pins (SCL_R, SDA_R) VIH VIL Low-level input voltage -0.5 0.3 x VDD V Notes: 1. VIL specification is for the first low level seen by the SCL/SDA lines. VICL is for the second and subsequent low levels seen by the TSCL/TSDA lines.
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Electrical Characteristics (over recommended operating conditions unless otherwise noted)
Symbol IDD Parameter Supply Current Test Conditions VIH = VDD, VIL = VDD - 0.4V, RT = 50-ohm, VDD = 3.3V Data Inputs = 1.65 Gbps HDMI data pattern CLK Inputs = 165 MHz clock OC_Sx = Low, x = 0,1,2,3 OE = HIGH, VDD = 3.3V, Source = off Min. Typ.(1) 120 Max. Units mA
PD IDDQ
Power Dissipation Standby Current
400 2
mW mA
TMDS Differential Pins VOH VOL Vswing VOD(O) VOD(U) VOC(SS) I(OS) VODE(SS) VODE(PP) VI(open) RINT IIH IIL Single-ended high-level output voltage Single-ended low-level output voltage Single-ended output swing voltage Overshoot of output differential voltage Undershoot of output differential voltage Change in steady-state common-mode output voltage between logic states Short circuit output current OC_Sx = GND, Data Inputs = 250 Mbps HDMI data pattern, Peak-to-peak output differential voltage 25 MHz pixel clock, x = 0,1,2,3 Steady state output differential voltage Single-ended input voltage under high impedance input or open input Input termination resistance High-level digital input current Low-level digital input current II = 10A VIN = 2.9V, RxSense pin = HIGH VIH = 2V or VDD VI = GND or 0.8 V VI = 5.5 V VI = VDD VO = 3.6 V VIL = GND IOL = 2.5 mA IADJ = H VI = 5.0 V or 0 V, Frequency = 100kHz VI = 3.0 V or 0 V, Freq = 100kHz IOH = -8 mA IOL = 8 mA (Table Continued)
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
VDD10 VDD - 600 VDD = 3.3V, RT = 50-ohm Pre-emphasis/De-emphasis = 0dB 400 6% 12% 0.5
VDD + 10 VDD - 400 600 15% 25% 5 12 2x Vswing mV mA mVp-p mV ohm A A mV
560 800 VDD - 10 45 -10 -10 -50 -10 -10 -40 0.65 50
840 1200 VDD + 10 55 10 10 50 10 10 40 0.9 25 10
Control Pins (OE, DDC_EN, IADJ)
I2C Pins (SCL_T, SDA_T) (T Port) Iikg IOH IIL VOL CIO Input leakage current High-level output current Low-level input current Low-level output voltage Input/output capacitance A A A V pF V 0.4 V
VOH(TTL)1 TTL High-level output voltage VOL(TTL) TTL Low-level output voltage Note: 1. Voh/Vol of external driver at the R and T ports.
1
2.4
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
I2C Pins (SCL_R, SDA_R Port) Iikg IOH IIL VOL CI Input leakage current High-level output current Low-level input current Low-level output voltage Input capacitance VI = 5.5 V VI = VDD VO = 3.6 V VIL = GND IOL = 4 mA, IADJ = H VI = 5.0 V or 0 V, Freq = 100kHz VI = 3.0 V or 0 V, Freq = 100kHz Test Conditions Min. Typ.(1) -50 -10 -10 -10 50 10 10 10 0.2 25 10 Max. 2000 75 VDD = 3.3V, RT = 50-ohm, pre-emphasis/de-emphasis = 0dB 75 10 23 pre-emphasis/de-emphasis = 0dB, Data Inputs = 1.65 Gbps HDMI data pattern CLK input = 165 MHz clock de-emphasis = -3.5dB, Data Inputs = 250 Mbps HDMI data pattern, CLK output = 25 MHz clock
(2)
A A A V pF
Switching Characteristics (over recommended operating conditions unless otherwise noted)
Symbol TMDS Differential Pins tpd tr tf tsk(p) tsk(D) tsk(o) tCLKjit(pp) tDatajit(pp) tDE tSX ten tdis Propagation delay Differential output signal rise time (20% - 80%) Differential output signal fall time (20% - 80%) Pulse skew Intra-pair differential skew Inter-pair differential skew Peak-to-peak output jitter for TMDS clock channel Peak-to-peak output jitter for TMDS data channels De-emphasis duration Select to switch output Enable time Disable time Propagation delay time, low-to-high-level output SCL_T/SDA_T to SCL_R/SDA_R Propagation delay time, high-to-low-level output SCL_T/SDA_T to SCL_R/SDA_R Propagation delay time, low-to-high-level output SCL_T/SDA_T to SCL_R/SDA_R Propagation delay time, high-to-low-level output SCL_T/SDA_T to SCL_R/SDA_R SCL_T/SDA_T Output signal rise time SCL_T/SDA_T Output signal fall time SCL_R/SDA_R Output signal rise time SCL_R/SDA_R Output signal fall time Enable to start condition Enable after stop condition
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Parameter
Units
240 240 50 50 100 15 18 240 10 200 10 ns 30 50 ps
I2C PINS (SCL_R, SDA_R, SCL_T, SDA_T) tPLH tPHL tPLH tPHL tr tf tr tf tset thold IADJ = VDD CLOAD = 300 pF Tbuffer : Rpu = 2K, Vpu = 3.0V Rbuffer : Rpu = 1.2K, Vpu = 3.3V or Rpu = 1.8K, Vpu = 5V IADJ = GND CLOAD = 100 pF 500 136 450 136 999 See Fig. A 90 999 90 6 6 10 10
PS8924A 11/29/07
ns
ns
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
IADJ = L
3.3V 10% VDD RL= 1.2k PULSE GENERATOR
VIN
RSCL/RSDA Input V DD
V DD /2 0.1V t PHL t PLH 3.3V10% 80% 1.5V 20% tf 20% tf VOL
D.U.T.
VIOUT
CL= 100pF
TSCL/TSDA Input
80%
IADJ = H
3.3V 10% VDD RL= 2k PULSE GENERATOR
VIN
RSCL/RSDA Input V DD
1.5V 0.1V t PHL t PLH 5V10% 80% V DD /2 20% tf 20% tf VOL
D.U.T.
VIOUT
CL= 300pF
TSCL/TSDA Input
80%
t PLH
Figure A. I2C Timing Test Circuit and Definition
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
Application Information
Supply Voltage All VDD pins are recommended to have a 0.01uF capacitor tied from VDD to GND to filter supply noise TMDS inputs Standard TMDS terminations have already been integrated into Pericom's PI3HDM101 device. Therefore, external terminations are not required. Any unused port must be left floating and not tied to GND.
Package Mechanical: 42-pin, Low Profile Quad Flat Package (ZH42)
DATE: 03/10/06
DESCRIPTION: 42-contact Thin Fine Pitch Quad Flat No-Lead (TQFN) PACKAGE CODE: ZH (ZH42) DOCUMENT CONTROL #: PD-2035
06-0219
REVISION: A
Ordering Information
Ordering Code PI3HDMI101ZHE Package Code ZH Package Description 42-pin, Pb-free & Green TQFN
Notes: * Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
* E = Pb-free and Green * Adding an X Suffix = Tape/Reel
* HDMI & Deep Color are trademarks of Silicon Image
Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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ADVANCE INFORMATION - COMPANY CONFIDENTIAL
PI3HDMI101 1:1 Active HDMI Redriver with Optimized Equalization & I2C Buffer
TM
HDMI Licensing, LLC, a wholly owned subsidiary of Silicon Image, Inc., is the agent responsible for licensing the HDMI Specification, promoting the HDMI standard and providing education on the benefits of HDMI to retailers and consumers. The HDMI Specification was developed by Sony, Hitachi, Thomson (RCA), Philips, Matsushita (Panasonic), Toshiba and Silicon Image as the digital interface standard for the consumer electronics market. The HDMI specification combines uncompressed high-definition video and multi-channel audio in a single digital interface to provide crystal-clear digital quality over a single cable. For more information about HDMI, please visit www.hdmi.org
HDMI, High-Definition Multimedia Interface, and Deep Color are trademarks of HDMI Licensing, LLC in the United States and other countries.
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